1. Field of the Invention
The present invention relates generally to integrated circuits, and more articularly but not exclusively to bipolar transistors.
2. Description of the Background Art
As is well known, a bipolar transistor comprises a base, an emitter, and a collector. In a so-called “SiGe bipolar transistor”, the base comprises silicon-germanium. SiGe bipolar transistors are popular because of their relatively high maximum frequency of oscillation (Fmax) and switching frequency (Ft), which make them specially suitable for high-frequency applications such as wireless communications.
FIGS. 1(a) to 1(f) show cross-sectional views schematically illustrating a conventional method of forming an SiGe transistor. In FIG. 1(a), an SiGe layer 103 is epitaxially grown on a silicon layer 101. The epitaxial growth of SiGe layer 103 also results in the growth of polycrystalline silicon-germanium (“poly-SiGe”) layers 104 on isolation structures 102. Isolation structures 102 may be shallow trench isolation (STI) structures filled with silicon dioxide.
In FIG. 1(b), a polycrystalline silicon (“polysilicon”) layer 106 is formed over a silicon dioxide layer 105, which is formed over SiGe layer 103 and poly-SiGe layers 104. A mask comprising photoresists 108 is formed over polysilicon layer 106 to define an emitter window 121 (see FIG. 1(c)).
In FIG. 1(c), emitter window 121 is formed by etching through exposed portions of polysilicon layer 106, and through silicon dioxide layer 105. Emitter window 121 exposes a portion of SiGe layer 103 referred to as an “intrinsic base region”. The rest of SiGe layer 103 and poly-SiGe layers 104 are referred to as “extrinsic base regions”. The intrinsic base region serves as the base of the transistor being fabricated.
In FIG. 1(d), a polysilicon layer 107 is deposited over the sample of FIG. 1(c).
In FIG. 1(e), another mask, which comprises a photoresist 109, is patterned on polysilicon layer 107 to define an emitter.
In FIG. 1(f), polysilicon layer 107 is etched to form the emitter. Extrinsic base implant and activation steps are then performed.
The above described method uses one mask (i.e., photoresists 108) to define the emitter window and another mask (i.e., photoresist 109) to define the emitter. A misalignment in any of the two masks may lead to variations in the distance between the emitter and the extrinsic base regions. These distance variations may result in increased capacitance, high base leakage current, and/or high resistance in the base. Additionally, the use of two masks may result in un-implanted regions between the emitter and the extrinsic base regions. These un-implanted regions are high resistance regions that may reduce the Fmax of the device.